HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 247

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Internal Clock Frequency
ø/2
ø/8
ø/32
ø/128
ø/256
ø/1024
ø/2048
ø/4096
Table 12-3 PWM Timer Parameters for 10MHz System Clock
12.3 Operation
Figure 12-2 shows the timing of the PWM timer operation.
1. Positive Logic (OS = “0”)
(1) When OE = “0”—(a) in figure 12-2: The timer count is held at H'00 and PWM output is
(2) When OE = “1”
2. Negative Logic (OS = “1”): The operation is the same except that High and Low are reversed
in the PWM output. [(e) in figure 12-2]
inhibited. (The pin is used for port 9 input/output, and its state depends on the corresponding
port 9 data register and data direction register.) Any value (such as N in figure 12-2) written
in the DTR becomes valid immediately.
i) The timer counter begins incrementing, and the PWM output goes High. [(b) in figure 12-2]
ii) When the count reaches the DTR value, the PWM output goes Low. [(c) in figure 12-2]
iii)If the DTR value is changed (by writing the data “M” in figure 12-2), the new value
becomes valid after the timer count changes from H'F9 to H'00. [(d) in figure 12-2]
Resolution
200ns
800ns
3.2µs
12.8µs
25.6µs
102.4µs
204.8µs
409.6µs
PWM Period
50µs
200µs
800µs
3.2ms
6.4ms
25.6ms
51.2ms
102.4ms
232
PWM Frequency
20kHz
5kHz
1.25kHz
312.5Hz
156.3Hz
39.1Hz
19.5Hz
9.8Hz

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