HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 90

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

3.8.2 Program Execution State
In this state the CPU executes program instructions in normal sequence.
3.8.3 Exception-Handling State
The exception-handling state is a transient state that occurs when the CPU alters the normal
program flow due to an interrupt, trap instruction, address error, or other exception. In this state
the CPU carries out a hardware-controlled sequence that prepares it to execute a user-coded
exception-handling routine.
*
*
1
2
Exception-handling
Bus-released state
From any state except the hardware standby mode, a transition to the reset state occurs
whenever RES goes Low.
A transition to the hardware standby mode from any state occurs when STBY goes Low.
Reset state
state
BREQ = “1”
*
1
handling
exception
BREQ = “0”
handling
for exception
Figure 3-12 State Transitions
End of
STBY = “1”, RES = “0”
Program execution state
Interrupt request
Request
BREQ = “1”
BREQ = “0”
NMI
instruction
with standby
71
SLEEP
flag set
SLEEP
instruction
Hardware standby mode
Sleep mode
Software standby mode
* 2