HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 45
HD6475328-CP10
Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6475328-CP10.pdf
(459 pages)
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Mode 4 (Expanded Maximum Mode): Mode 4 supports a maximum 1M-byte address space of
which the first 32K bytes are in on-chip ROM. Ports 1 to 6 are used for bus lines and bus control
signals as follows:
Control signals: Ports 1* and 2
Data bus:
Address bus:
* The functions of individual pins in ports 1, 5, and 6 are software-selectable.
Note: In mode 4, ports 5 and 6 are initially general-purpose input ports. Software must change
them to output before using them for the address bus. See section 9.6, “Port 5” and 10.7, “Port 6”
for details. The following instruction sets all pins of ports 5 and 6 to output:
Mode 7 (Single-Chip Mode): In this mode all memory is on-chip, in 32K bytes of ROM and 1K
byte of RAM. It is not possible to access off-chip addresses.
The single-chip mode provides the maximum number of ports. All the pins associated with the
address and data buses in the expanded modes are available as general-purpose input/output ports
in the single-chip mode.
2.3 Address Space Map
2.3.1 Page Segmentation
The H8/532’s address space is segmented into 64K-byte pages. In the single-chip mode and
expanded minimum modes there is just one page: page 0. In the expanded maximum modes there
can be up to 16 pages. Figure 2-1 shows the address space in each mode and indicates which parts
are on- and off-chip.
Port 3
Ports 4, 5*, and 6*
MOV.W #H'FFFF, @H'FF88
25
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