HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 169

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Bit
Initial value
Read/Write
9.4.2 Port 3 Registers
Register Configuration: Table 9-6 lists the registers of port 3.
Table 9-6 Port 3 Registers
Name
Port 3 data direction register
Port 3 data register
1. Port 3 Data Direction Register (P3DDR)—H'FF84
P3DDR is an 8-bit register that selects the direction of each pin in port 3.
P3DDR can be written but not read. An attempt to read this register does not cause an error, but
all bits are read as “1,” regardless of their true values.
At a reset and in the hardware standby mode, P3DDR is initialized to H'00, making all eight pins
input pins. P3DDR is not initialized in the software standby mode, so if a P3DDR bit is set to “1”
when the chip enters the software standby mode, the corresponding pin continues to output the
value in the port 3 data register.
Single-Chip Mode: A pin functions as an output pin if the corresponding bit in P3DDR is set
to “1,” and as an input pin if the bit is cleared to “0.”
Expanded Modes: P3DDR is not used.
P3
7
W
7
DDR P3
0
6
W
6
0
DDR P3
Abbreviation
P3DDR
P3DR
5
W
5
0
DDR P3
152
4
W
4
DDR P3
0
Read/Write
W
R/W
3
W
3
0
DDR P3
Initial Value
H'00
H'00
2
W
2
DDR P3
0
1
W
1
DDR P3
0
Address
H'FF84
H'FF86
0
W
0
0
DDR

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