HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 73

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Table 3-11 Arithmetic Instructions (cont)
Instruction
Arithmetic
operations
Note: B—byte; W—word
3.5.4 Logic Operations
Table 3-12 lists the four instructions that perform logic operations.
Table 3-12 Logic Operation Instructions
Instruction
Logical
operations
Note: B—byte; W—word
EXTS
EXTU
TST
NEG
CLR
TAS
AND
OR
XOR
NOT
Size
B
B
B/W
B/W
B/W
B
Size
B/W
B/W
B/W
B/W
Function
(<bit 7> of <Rd>)
Converts byte data in a general register to word data by
extending the sign bit.
0
Converts byte data in a general register to word data by
padding with zero bits.
(EAd) – 0
Compares general register or memory contents with 0.
0 – (EAd)
Obtains the two’s complement of general register or
memory contents.
0
Clears general register or memory contents to 0.
(EAd) — 0, (1)
Tests general register or memory contents, then sets the
most significant bit (bit 7) to “1.”
Function
Rd (EAs)
Performs a logical AND operation on a general register
and another general register, memory, or immediate data.
Rd (EAs)
Performs a logical OR operation on a general register and
another general register, memory, or immediate data.
Rd (EAs)
Performs a logical exclusive OR operation on a general register
and another general register, memory, or immediate data.
¬ (EAd)
Obtains the one’s complement of general register or memory
contents.
(<bits 15 to 8> of <Rd>)
(EAd)
(EAd)
54
(EAd)
Rd
Rd
Rd
2
(<bit 7> of <EAd>)
(<bits 15 to 8> of <Rd>)

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