HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 204

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit 3
OLVLB
0
1
Bit 2—Output Level A (OLVLA): This bit selects the logic level to be output at the FTOA pin
when the FRC and OCRA values match.
Bit 2
OLVLA
0
1
Bit 1—Input Edge Select (IEDG): This bit selects whether to capture the count on the rising or
falling edge of the input capture signal.
Bit 1
IEDG
0
1
Bit 0—Counter Clear A (CCLRA): This bit selects whether to clear the FRC at compare-match
A (when the FRC and OCRA values match).
Bit 0
CCLRA Description
0
1
Description
A “0” logic level (Low) is output for compare-match B.
A “1” logic level (High) is output for compare-match B.
Description
A “0” logic level (Low) is output for compare-match A.
A “1” logic level (High) is output for compare-match A.
Description
The FRC value is copied to the ICR on the falling edge
of the input capture signal.
The FRC value is copied to the ICR on the rising edge
of the input capture signal.
The FRC is not cleared.
The FRC is cleared at compare-match A.
(Initial value)
187
(Initial value)
(Initial value)
(Initial value)