HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 282

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

The RDR and RSR function as a double buffer. Data can be received continuously by reading
each byte of data from the RDR and clearing the RDRF bit to 0 before the last bit of the next
byte is received.
In general, an external clock source should be used for receiving data.
If an internal clock source is selected, the SCI starts receiving data as soon as the RE bit is set
to 1. The serial clock is also output at the SCK pin. The SCI continues receiving until the RE
bit is cleared to 0.
If the last bit of the next data byte is received while the RDRF bit is still set to 1, an overrun
error occurs and the ORER bit is set to 1. If the RIE bit is set to 1, a receive-error interrupt
(ERI) is requested. The data received in the RSR are not transferred to the RDR when an
overrun error occurs.
After an overrun error, reception of the next data is enabled when the ORER bit is cleared to 0.
• Simultaneous Transmit and Receive: The procedure for transmitting and receiving
(2) Set the RE bit in the SCR to 1.
(3) Incoming data bits are latched in the RSR on eight clock pulses.
(4) The SCI transfers the received data byte to the RDR so that it can be read.
simultaneously is as follows:
(1) Set up the desired communication conditions in the SMR, BRR, and SCR.
(2) Set the TE and RE bits in the SCR to 1.
(3) Data transmitting and receiving start when the TDRE bit in the SSR is cleared to 0.
(4) Data are sent and received in synchronization with eight clock pulses.
The RXD pin will automatically be switched to input and the SCI is ready to receive
data.
When 8 bits of data have been received, the SCI sets the RDRF bit in the SSR to 1. If
the RIE bit is set to 1, a receive-end interrupt (RXI) is requested.
The RDRF bit is cleared when the program reads the RDRF bit in the SSR, then writes a
0 in the RDRF bit, or when the data transfer controller (DTC) reads the RDR.
The TXD and RXD pins are automatically switched to output and input, respectively,
and the SCI is ready to transmit and receive data.
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