HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 212
HD6475328-CP10
Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6475328-CP10.pdf
(459 pages)
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10.4.4 Setting of FRC Overflow Flag (OVF)
The FRC overflow flag (OVF) is set to “1” when the FRC overflows (changes from H'FFFF to
H'0000). Figure 10-10 shows the timing of this operation.
10.5 CPU Interrupts and DTC Interrupts
Each free-running timer channel can request four types of interrupts: input capture (ICI), output
compare A and B (OCIA and OCIB), and overflow (FOVI). Each interrupt is requested when the
corresponding enable and flag bits are set. Independent signals are sent to the interrupt controller
for each type of interrupt. Table 10-3 lists information about these interrupts.
Table 10-3 Free-Running Timer Interrupts
Interrupt
ICI
OCIA
OCIB
FOVI
The ICI, OCIA, and OCIB interrupts can be directed to the data transfer controller (DTC) to have
a data transfer performed in place of the usual interrupt-handling routine.
When the DTC serves one of these interrupts, it automatically clears the ICF, OCFA, or OCFB
flag to “0.” See section 6, “Data Transfer Controller” for further information on the DTC.
ø
FRC
Internal overflow
signal
OVF
Description
Requested when ICF is set
Requested when OCFA is set
Requested when OCFB is set
Requested when OVF is set
Figure 10-10 Setting of Overflow Flag (OVF)
H’FFFF
195
DTC Service Available?
Yes
Yes
Yes
No
H’0000
Priority
High
Low
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