CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
Page 101
102
Page 102
103
Page 103
104
Page 104
105
Page 105
106
Page 106
107
Page 107
108
Page 108
109
Page 109
110
Page 110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
Page 102/178

Download datasheet (3Mb)Embed
PrevNext
CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
1 = All receive characters, even those with errors, are processed for special charac-
ter/flow control processing.
Bits 4:2
Reserved – must be ‘0’.
Bits 1:0
Transmit processing for CR and NL; these bits define Translation mode when CR
and/or NL are present in the transmit data.
ONLCR
8.2.9
Special Character Registers — Async Modes Only
Special Character registers can be used for detecting specific receive characters in the incoming
data stream, and can be used to transmit characters (by STCR) preempting any data in the transmit
FIFO.
8.2.9.1
Special Character Register 1 (SCHR1)
Register Name: SCHR1
Register Description: Special Character Register 2
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
8.2.9.2
Special Character Register 2 (SCHR2)
Register Name: SCHR2
Register Description: Special Character Register 2
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Asynchronous Mode
Special characters 1 and 2 are used in conjunction with the SCDE bit COR3[4] to detect incoming
characters; when both SCDE and TxIBE (COR2[6]) are set, they define the in-band flow control
characters XON and XOFF.
102
OCRNL
0
0
No special action
0
1
CR translated to NL
1
0
NL translated to the sequence CR NL
CR translated to NL and NL translated to the sequence CR
1
1
NL
Bit 4
Bit 3
User-defined special character,
protocol-defined special characters (see below).
Bit 4
Bit 3
User-defined special character,
protcol-defined special characters (see below).
Intel Hex Address: x’1C
Motorola Hex Address: x’1F
Bit 2
Bit 1
Bit 0
Intel Hex Address: x’1D
Motorola Hex Address: x’1E
Bit 2
Bit 1
Bit 0
Datasheet