CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
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Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
8.6.5.5
A Buffer Transmit Byte Count (ATBCNT)
Register Name: ATBCNT
Register Description: Transmit Buffer ‘A’ Byte Count
Default Value: x’0000
Access: Word Read/Write
Bit 15
Bit 14
Bit 13
Bit 7
Bit 6
Bit 5
8.6.5.6
B Buffer Transmit Byte Count (BTBCNT)
Register Name: BTBCNT
Register Description: Transmit Buffer ‘B’ Byte Count
Default Value: x’0000
Access: Word Read/Write
Bit 15
Bit 14
Bit 13
Bit 7
Bit 6
Bit 5
These registers contain the count of the bytes in the buffers to be transmitted.
8.6.5.7
A Transmit Buffer Status (ATBSTS) — Async-HDLC/PPP Mode
Register Name: ATBSTS
Register Description: Transmit Buffer ‘A’ Status
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Berr
EOF
EOB
Setting the Append bit allows data to be added to the buffer after transmission has begun. In this
mode, the host sets ATADR and ATCNT as normal, but when new data is appended to the buffer,
the ATBCNT/BTBCNT (Transmit Buffer Count) can be updated. When the A buffer is used in
Append mode, the CD2231 does not set the EOB bit. When the host has completed use of the
buffer, it must issue the append complete command through STCR. The CD2231, upon
transmitting the last characters from the buffer, sets EOB, thus allowing the host to allocate a new
transmit buffer.
Datasheet
Bit 12
Bit 11
Binary count value, 16-bit count, bits 15:8
Bit 4
Bit 3
Binary count value, 16-bit count, bits 7:0
Bit 12
Bit 11
Binary count value, 16-bit count, bits 15:8
Bit 4
Bit 3
Binary count value, 16-bit count bits 7:0
Bit 4
Bit 3
0
0
Intel Hex Address: x’58
Motorola Hex Address: x’5A
Bit 10
Bit 9
Bit 8
Bit 2
Bit 1
Bit 0
Intel Hex Address: x’5A
Motorola Hex Address: x’58
Bit 10
Bit 9
Bit 8
Bit 2
Bit 1
Bit 0
Intel Hex Address: x’5C
Motorola Hex Address: x’5F
Bit 2
Bit 1
Bit 0
map32
INTR
2231own
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