CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
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CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.3.2.2
Transmit Clock Option Register (TCOR)
Register Name: TCOR
Register Description: Transmit Clock Option
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
ClkSel2
ClkSel1
ClkSel0
This register controls the transmit bit rate generator and Local Loopback mode.
Bits 7:5
These bits select the clock source for the transmit bit rate generator.
NOTE: See the description of clock options in
Bit 4
Reserved – must be ‘0’.
Bit 3
Times 1 external clock. This bit is set to ‘1’ when the user supplies the data clock on
TXCIN pin whose frequency is equal to the transmit data rate. When using the exter-
nal 1 clock or the clock from the receiver’s DPLL, the TBPR must be programmed
to 01h.
Bit 2
Reserved – must be ‘0’.
Bit 1
Local Loopback mode
1 = enables the Local Loopback mode
0 = disables the Local Loopback mode
Bit 0
Reserved – must be ‘0’.
8.4
Channel Command and Status Registers
8.4.1
Channel Command Register (CCR)
There are two CCR command sets. Mode 1 (if bit 7 is ‘0’) commands affect basic channel control.
In Mode 2 (if bit 7 is ‘1’), additional commands that control timer functions are available.
112
Bit 4
Bit 3
0
Ext-1X
ClkSel2
ClkSel1
ClkSel0
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Section
5.5.
Intel Hex Address: x’C2
Motorola Hex Address: x’C0
Bit 2
Bit 1
Bit 0
0
LLM
0
Select
0
Clk 0
1
Clk 1
0
Clk 2
1
Clk 3
0
Clk 4
1
Reserved
0
External clock
1
Receive clock
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