CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
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CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.3
Bit Rate and Clock Option Registers
8.3.1
Receive Baud Rate Generator Registers
8.3.1.1
Receive Baud Rate Period Register (RBPR)
Register Name: RBPR
Register Description: Receive BitRate Period
Default Value: x’81
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
This register contains the preload value for the receive baud rate counter. When using an internal
clock option or an n-times external clock, the preload value in conjunction with the receiver clock
source chosen, determines the receive bit rate. If a 1 external clock is used, a value of 01h must be
loaded in the RBPR.
8.3.1.2
Receive Clock Option Register (RCOR)
Register Name: RCOR
Register Description: Receive Clock Option
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
TLVal
0
DpllEn
This register is used to select the DPLL mode, and the desired clock source for the receive bit rate
generator.
Bit 7
TLVal – Transmit line value
This bit reflects the logical value of the transmit data pin. It is a read-only bit; writing
to this bit has no effect.
Bit 6
Reserved – must be ‘0’.
Bit 5
DPLL enable
1 = DPLL is enabled
0 = DPLL is disabled
Bits 4:3
DPLL mode selects the type of data encoding used.
110
Bit 4
Bit 3
Bit 2
Receive bit rate period (divisor)
Bit 4
Bit 3
Bit 2
Dpllmd1
Dpllmd0
ClkSel2
Intel Hex Address: x’C9
Motorola Hex Address: x’CB
Bit 1
Bit 0
Intel Hex Address: x’CA
Motorola Hex Address: x’C8
Bit 1
Bit 0
ClkSel1
ClkSel0
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