CD2231 Intel Corporation, CD2231 Datasheet - Page 142
CD2231
Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
1.CD2231.pdf
(178 pages)
- Current page: 142 of 178
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CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.6.4.2
8.6.4.3
8.6.4.4
142
Register Name: ARBADRU
Register Description: Receive Buffer ‘A’ 32-bit Address, upper word
Default Value: x’0000
Access: Word Read/Write
Register Name: BRBADRL
Register Description: Receive Buffer ‘B’ 32-bit Address, lower word
Default Value: x’0000
Access: Word Read/Write
Register Name: BRBADRU
Register Description: Receive Buffer ‘B’ 32-bit Address, upper word
Default Value: x’0000
Access: Word Read/Write
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
A Receive Buffer Address Register — Upper (ARBADRU)
B Receive Buffer Address Register — Lower (BRBADRL)
B Receive Buffer Address Register — Upper (BRBADRU)
These registers contain the start addresses of two external buffers that are used by the CD2231 to
store the next two receive data blocks. They are written to by the host and copied internally to
control the data transfer to the memory.
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Binary address value, 32-bit address, bits 23:16
Binary address value, 32-bit address, bits 31:24
Binary address value, 32-bit address, bits 23:16
Binary address value, 32-bit address, bits 31:24
Binary address value, 32-bit address, bits 15:8
Binary address value, 32-bit address, bits 7:0
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
Motorola Hex Address: x’44
Motorola Hex Address: x’40
Motorola Hex Address: x’46
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Intel Hex Address: x’46
Intel Hex Address: x’42
Intel Hex Address: x’44
Datasheet
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
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