Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 117

KIT DEV FOR Z8 ENCORE Z8FMC16100

Z8FMC160100KITG

Manufacturer Part Number
Z8FMC160100KITG
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphical User Interface
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4660
Table 65. Timer 0 Control 1 Register (T0CTL1)
BITS
FIELD
RESET
R/W
ADDR
PS024613-0910
Bit Position
[4]
TINSEL
[3–1]
PWMD
[0]
INCAP
Bit Position
[7]
TEN
TEN
R/W
7
0
Timer 0 Control 1 Register
The Timer 0 Control 1 (T0CTL1) register
prescaler value, and determines the timer operating mode.
Value (H)
Value (H)
000
001
010
011
100
101
110
0
1
111
0
1
0
1
TPOL
R/W
6
0
Description
Timer is enabled.
Timer is disabled.
Timer is enabled.
Description
Timer Input Select
Timer input is the Timer input pin. 
Timer input is the comparator output.
PWM Delay Value
This field is a programmable delay to control the number of additional
system clock cycles following a PWM or Reload compare before the
Timer Output or the Timer Output Complement is switched to the active
state. This field ensures a time gap between the deassertion of one
PWM output to the assertion of its complement.
No delay
2 cycles delay
4 cycles delay
8 cycles delay
16 cycles delay
32 cycles delay
64 cycles delay
128 cycles delay
Input Capture Event
Previous timer interrupt is not a result of a Timer Input Capture Event
Previous timer interrupt is a result of a Timer Input Capture Event.
5
PRES
R/W
000
4
F07H
(Table
3
65) enables/disables the timer, sets the
Z8FMC16100 Series Flash MCU
2
Product Specification
Timer 0 Control Registers
TMODE
R/W
000
1
0
105

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