Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 217
Z8FMC160100KITG
Manufacturer Part Number
Z8FMC160100KITG
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KITG.pdf
(2 pages)
4.Z8FMC160100KITG.pdf
(15 pages)
Specifications of Z8FMC160100KITG
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphical User Interface
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4660
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Table 109. Sample Hold Time (ADCST)
Table 110. ADC Clock Prescale Register (ADCCP)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024613-0910
Bit Position
[7:6]
[5:0]
SHT
Bit Position
[0]
DIV2
ADC Clock Prescale Register
7
7
The ADC Clock Prescale register
the ADC. When this register is programmed with
ADC Clock.
Reserved
Value (H)
Value (H)
0H–FH
R/W
0H
0
0
1
6
6
Reserved
Description
Reserved—Must be 0.
Sample Hold time in number of system clock periods to meet 1
minimum.
Description
DIV2
Clock is not divided
System Clock is divided by 2 for ADC Clock
0
5
1
5
(Table
4
1
4
F75H
F76H
R/W
110) is used to provide a divided system clock to
DIV16
3
1
3
0
R/W
0h
ST
Z8FMC16100 Series Flash MCU
, the System Clock is used for the
DIV8
2
1
2
0
ADC Clock Prescale Register
Product Specification
DIV4
1
1
1
0
µ
s
DIV2
0
1
0
0
205
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