Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 131

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

PS024613-0910
In LIN mode, the interrupts defined for normal UART operation still apply with the
following changes.
•
•
•
•
LIN System Clock Requirements
The LIN master provides the timing reference for the LIN network and is required to have
a clock source with a tolerance of ±0.5%. A slave with autobaud capability is required to
have a baud clock matching the master oscillator within ±14%. The slave nodes autobaud
to lock onto the master timing reference with an accuracy of ±2%. If a Slave does not
contain autobaud capability it must include a baud clock which deviates from the masters
by no more than ±1.5%. These accuracy requirements must include effects such as voltage
and temperature drift during operation.
Before sending or receiving messages, the Baud Reload High/Low registers must be
initialized. Unlike standard UART modes, the Baud Reload High/Low registers must be
loaded with the baud interval rather than 1/16 of the baud interval.
In order to autobaud with the required accuracy, the LIN slave system clock must be at
least 100 times the baud rate.
LIN Mode Initialization and Operation
The LIN protocol mode is selected by setting either the
Slave), and optionally (for LIN slave) the Autobaud Enable (
register. To access the LIN Control register, the
UART Mode Select/Status register must be =
must be initialized with
In addition to the
field exists that defines the current state of the LIN logic. This field is initially set by
Parity Error (
bit. The
UART is transmitting. This applies to both Master and Slave operating modes.
The Break Detect interrupt (
tected by the slave (break condition for at least 11 bit times). Software can use this in-
terrupt to start a timer checking for message frame timeout. The duration of the break
can be read in the
The Break Detect interrupt (
message has been received if the LIN-UART is in LinSleep state.
In LIN slave mode, if the BRG counter overflows while measuring the autobaud period
(Start bit to beginning of bit 7 of autobaud character) an Overrun Error is indicated (
bit in the Status0 register). In this case, software sets the LinState field back to
where the Slave ignores the current message and waits for the next Break. The Baud
Reload High and Low registers are not updated by hardware if this autobaud error
occurs. The
PLE
OE
bit indicates that receive data does not match transmit data when the LIN-
PE
LMST
bit is also set if a data overrun error occurs.
bit in Status0 register) is redefined as the Physical Layer Error (
RxBreakLength[3:0]
,
TEN
LSLV
=
and
1
BRKD
,
BRKD
REN
ABEN
bit in Status0 register) indicates when a Break is de-
=
bit in Status0 register) indicates when a Wake-up
1
bits in the LIN Control register, a
, all other bits =
field of the Mode Status register.
010B
MSEL
Z8FMC16100 Series Flash MCU
. The LIN-UART Control0 register
LMST
(Mode Select) field of the LIN-
0
.
ABEN
(LIN Master) or
Product Specification
) bits in the LIN Control
LIN Protocol Mode
LinState
LSLV
10b
PLE
(LIN
[1:0]
OE
,
)
119