Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 242

KIT DEV FOR Z8 ENCORE Z8FMC16100

Z8FMC160100KITG

Manufacturer Part Number
Z8FMC160100KITG
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphical User Interface
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4660
Table 128. Oscillator Configuration and Selection
PS024613-0910
Clock Source
Internal Precision
Oscillator
External Crystal/
Resonator/
External Clock
Drive
Internal Watchdog
Timer Oscillator
Clock Selection Following System Reset
Clock Failure Detection and Recovery for Primary Oscillator
Unintentional accesses to the Oscillator Control register (OSCCTL) can stop the chip by
switching to a nonfunctioning oscillator. Accidental alteration of the OSCCTL register is
prevented by a locking/unlocking scheme. To write the register, unlock it by two writes to
the OSCCTL register with the values
register then changes the value of the register and returns the register to a locked state.
Any other sequence of oscillator control register writes has no effect. The values written to
unlock the register must be ordered correctly, but need not be consecutive. It is possible to
access other registers within the locking/unlocking operation.
The Internal Precision Oscillator (IPO) is selected following a System Reset. Startup code
after the System Reset may change the system clock source by unlocking and configuring
the OSCCTL register. If the
Low Power mode is enabled during reset. When Flash Low Power mode is enabled during
reset, the
the OSCDIV register is set to
The Z8FMC16100 Series Flash MCU generates a System Exception, when a failure of the
primary oscillator occurs, if the
system function in this situation, the clock failure recovery circuitry automatically forces
Characteristics
• 5.5296 MHz
• High precision possible when trimmed
• No external components required
• 0 MHz to 20 MHz
• Very high accuracy (dependent on
• Requires external components
• 10 kHz nominal
• Low accuracy
• No external components required
• Low power consumption
crystal/resonator or external source)
FLPEN
bit in the Oscillator Control register (OSCCTL) is set and the
LPDEN
08h
POFEN
.
bit in Program Memory Address 0001H is 0, Flash
E7H
bit is set in the OSCCTL register. To maintain
followed by
Required Setup
• This is the reset default
• Configure Option Bits for correct
• Unlock and write Oscillator Control
• Wait for 50 ms stabilization time
• Unlock and write Oscillator Control
• Unlock and write Oscillator Control
external oscillator mode
register (OSCCTL) to enable external
oscillator
register (OSCCTL) to select external
oscillator
register (OSCCTL) to enable and select
Internal WDT oscillator
Z8FMC16100 Series Flash MCU
Clock Selection Following System Reset
18H
. A third write to the OSCCTL
Product Specification
DIV
field of
230

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