Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 68

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

Table 33. IRQ0 Enable High Bit Register (IRQ0ENH)
BITS
FIELD
RESET
R/W
ADDR
PS024613-0910
Bit Position
[0]
PA40I
IRQ0 Enable High and Low Bit Registers
PWMENH
R/W
7
0
The IRQ0 Enable High and Low Bit registers, shown in
priority encoded enabling for interrupts in the Interrupt Request 0 register. Priority is 
generated by setting bits in each register.
Table 32. IRQ0 Enable and Priority Encoding
PWMENH—PWM Interrupt Request Enable High Bit
FLTENH—Fault Interrupt Request Enable High Bit
ADCENH—ADC Interrupt Request Enable High Bit
CMPENH—Comparator Interrupt Request Enable High Bit
T0ENH—Timer 1 Interrupt Request Enable High Bit
U0RENH—UART 0 Receive Interrupt Request Enable High Bit
U0TENH—UART 0 Transmit Interrupt Request Enable High Bit
SPIENH—SPI Interrupt Request Enable High Bit
IRQ0ENH[x] IRQ0ENL[x] Priority
0
0
1
1
Note: x indicates the register bits from 0 through 7.
Value (H)
0
1
FLTENH
R/W
6
0
Description
PA4 or PA0 Interrupt Request—Logic in the Port A GPIO module selects
either PA4 or PA0 and either rising or falling edge.
No interrupt request is pending for PA4 or PA0
An interrupt request from PA4 or PA0 is awaiting service.
ADCENH CMPENH
0
1
0
1
R/W
5
0
Disabled
Level 1
Level 2
Level 3
R/W
4
0
FC1H
Table 32
T0ENH
R/W
Description
Disabled
Low
Nominal
High
3
0
describes the priority control for IRQ0.
Z8FMC16100 Series Flash MCU
IRQ0 Enable High and Low Bit Registers
U0RENH
Table 33
R/W
2
0
Product Specification
and
U0TENH
Table
R/W
1
0
34, form a 
SPIENH
R/W
0
0
56