Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 61

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

Interrupt Controller
PS024613-0910
Interrupt and System Exception Vector Listing
Note:
The interrupt controller on the Z8FMC16100 Series Flash MCU prioritizes the system
exceptions and interrupt requests from the on-chip peripherals and the GPIO port pins.
The features of the interrupt controller include:
•
•
•
•
•
System exceptions (SEs) and interrupt requests (IRQs) allow peripheral devices to
suspend CPU operation in an orderly manner and force the CPU to start a service routine.
Interrupt service routines are involved with the data exchange, status information, or 
control information between the CPU and the interrupting peripheral. When the service
routine is completed, the CPU returns to the operation from which it was interrupted.
The eZ8 CPU supports both vectored and polled interrupt handling. For polled interrupts,
the interrupt controller has no effect on operation.
For more information on interrupt servicing by the eZ8 CPU, refer to eZ8 CPU User Man-
ual (UM0128), available for download at www.zilog.com.
Table 29
always have priority over interrupts. The system exception and interrupt vectors are stored
with the most significant byte (MSB) at the even Program Memory address and the least
significant byte (LSB) at the following odd Program Memory address.
Port interrupts are only available in those packages which support the associated port
pins.
Multiple GPIO interrupts.
Interrupts for on-chip peripherals.
Non-maskable system exceptions.
Three levels of individually programmable interrupt priority.
20 sources of interrupts for the interrupt controller, 9 of the sources can be configured
from GPIO pins.
lists the SEs and the interrupts in order of priority. Reset and system exceptions
Interrupt and System Exception Vector Listing
Z8FMC16100 Series Flash MCU
Product Specification
49