Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 84

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

PS024613-0910
Note:
PWM Timer and Fault Interrupts
Fault Detection and Protection
The PWM generates interrupts to the eZ8 CPU on any of the following events:
PWM Reload—
register reload occurs (the
PWM Fault—
assertion of the comparator.
The Z8FMC16100 Series Flash MCU contains hardware and software fault controls that
allow rapid deassertion of all enabled PWM output signals. A logic Low on an external
fault pin (FAULT0 or FAULT1), or the assertion of the overcurrent comparator, forces the
PWM outputs to a predefined OFF state.
Similar deassertion of the PWM outputs can be accomplished in software by writing to the
PWMOFF
the outputs are deasserted (made inactive) due to one of these fault conditions.
The fault inputs can be individually enabled through the PWM Fault Control register. If a
fault condition is detected and the source is enabled, a fault interrupt is generated. The
PWM Fault Status register (PWMFSTAT) is read to determine which fault source has
caused the interrupt.
After a fault has been detected, and after the PWM outputs are disabled, modulator control
of the PWM outputs can be re-enabled either by software, or by deassertion of the FAULT
input signal. Selection of either method is made through the PWM Fault Control register
(PWMFCTL). Configuration of the fault modes and re-enable methods allows pulse-by-
pulse limiting and hard shutdown. When configured in automatic restart mode, the PWM
outputs are reengaged at beginning of the next PWM cycle (the master timer value is equal
to 0) if all fault signals are deasserted. In a software-controlled restart, all fault inputs must
be deasserted and all fault flags cleared.
The fault input pin is Schmitt-triggered. The input signal from the pin and comparators,
pass though an analog filter to reject high-frequency noise.
The logic path from the fault sources to the PWM outputs is asynchronous, which ensures
that the fault inputs forces the PWM outputs to their OFF state, even if the system clock is
stopped.
After Reset the Fault mechanism is active, disable the Fault source for normal port input
operation.
bit in the PWM Control 0 register. The PWM counter continues to operate while
A fault condition is indicated by asserting any of the FAULT pins or by the
The interrupt is generated at the end of PWM period, when a PWM
READY
bit is set).
Z8FMC16100 Series Flash MCU
PWM Timer and Fault Interrupts
Product Specification
72