Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 38

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

Table 8. Stop Mode Recovery Sources and Resulting Action
PS024613-0910
Operating Mode
Stop Mode
Caution:
Stop Mode Recovery Using Watchdog Timer Timeout
Stop Mode Recovery Using a GPIO Port Pin Transition
PWM Fault0 and Reset pin selection
The eZ8 CPU fetches the Reset vector at Program Memory addresses
and loads that value into the Program Counter. Program execution begins at the Reset
vector address. Following Stop Mode Recovery, the STOP bit in the
trol Register
actions.
If the WDT times out during STOP mode, the device undergoes a SMR sequence. In the
Reset Status and Control
configured to generate a System Exception upon timeout, the eZ8 CPU services the WDT
System Exception following the normal Stop Mode Recovery sequence.
Each of the GPIO port pins may be configured as a Stop Mode Recovery input source. On
any GPIO pin enabled as a Stop Mode Recovery source, a change in the input pin value
(from High to Low or from Low to High) initiates Stop Mode Recovery. The GPIO Stop
Mode Recovery signals are filtered to reject pulses less than 10 ns (typical) in duration. In
the

Short pulses on the Port pin can initiate Stop Mode Recovery without initiating an interrupt
(if enabled for that pin).
The RESET pin can be set to function as a PWM Fault input. When selected, the RESET
input function is disabled. The
software selection of the RESET pin function. The pin function is selected by writing the
the unlock sequence followed by the mode to this register. A software write to the
bit overrides the value set by the
Reset Status and Control
Stop Mode Recovery Source
WDT timeout when configured for Reset
WDT timeout when configured for System
Exception
Data transition on any GPIO port pin
enabled as a Stop Mode Recovery source
is set to 1.
Register, the WDT and STOP bits are set to 1. If the WDT is 
Table 8
Register, the STOP bit is set to 1.
FLTSEL
FLTSEL
lists the Stop Mode Recovery sources and resulting
bit in the
Stop Mode Recovery Using Watchdog Timer Timeout
user option bit
Reset Status and Control Register
Action
Stop Mode Recovery
Stop Mode Recovery followed by WDT
System Exception
Stop Mode Recovery
Z8FMC16100 Series Flash MCU
Product Specification
Reset Status and Con-
0002h
and
FLTSEL
0003h
allows
26