Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 302

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

Table 164. eZ8 CPU Instruction Summary (Continued)
PS024613-0910
Assembly
Mnemonic
TMX dst, src
TRAP Vector
WDT
XOR dst, src
XORX dst, src
Note: Flags Notation:
1 = set to 1
* = Value is a function of the result of the operation.
– = unaffected.
X = undefined.
0 = reset to 0.
Flags Register
.
The Flags register contains the status information regarding the most recent arithmetic,
logical, bit manipulation, or rotate and shift operation. The Flags register contains six bits
of status information that are set or cleared by CPU operations. Four of the bits (C, V, Z,
and S) are tested for use with conditional jump instructions. Two flags (H and D) cannot
be tested and are used for Binary-Coded Decimal (BCD) arithmetic.
The two remaining bits, User Flags (F1 and F2), are available as general-purpose status
bits. User Flags are unaffected by arithmetic operations and must be set or cleared by
instructions. The User Flags cannot be used with conditional Jumps. They are undefined at
dst AND src
Symbolic Operation
SP
@SP
SP
@SP
PC
dst
dst







SP – 2
SP – 1
dst XOR src
dst XOR src
@Vector
PC
FLAGS
Address
dst src
ER ER
ER
ER ER
ER
IR
R
R
R
r
r
Mode
Vect
IM
IM
IM
IM
IR
or
R
Ir
r
Opcode
(Hex)
(s)
F2
5F
B2
B3
B4
B5
B6
B7
B8
B9
78
79
— *
— — — — — —
— — — — — —
— *
— *
C Z
Z8FMC16100 Series Flash MCU
Flags
S V D H
*
*
*
0 — —
0 — —
0 — —
Product Specification
eZ8 CPU Instruction Set
Cycles
Fetch
4
4
2
1
2
2
3
3
3
3
4
4
Cycles
Instr.
3
3
6
2
3
4
3
4
3
4
3
3
290