Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 137

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

PS024613-0910
Noise Filter
LIN-UART Baud Rate Generator
The LIN-UART Baud Rate Generator creates a lower frequency baud rate clock for data
transmission. The input to the Baud Rate Generator is the system clock. The LIN-UART
Baud Rate High and Low Byte registers combine to create a 16-bit baud rate divisor value
(
UART data rate is calculated using the following equation for normal UART operation:
The LIN-UART data rate is calculated using the below equation for LIN mode UART
operation:
When the LIN-UART is disabled, the Baud Rate Generator can function as a basic 16-bit
timer with interrupt on timeout. To configure the Baud Rate Generator as a timer with
interrupt on timeout, complete the below procedure:
1. Disable the LIN-UART receiver by clearing the
2. Load the appropriate 16-bit count value into the LIN-UART Baud Rate High and Low
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
A noise filter circuit is included which filters noise on a digital input signal (such as UART
Receive Data) before the data is sampled by the block. This is likely to be a requirement
for protocols with a noisy environment.
The noise filter contains the following features:
•
•
•
UART Data Rate (bps)
UART Data Rate (bps)
BRG
register to 0 (
Byte registers.
BRGCTL bit in the LIN-UART Control 1 register to 1.
Synchronizes the receive input data to the System Clock.
Noise Filter Enable (
(
Noise Filter Control (
counter digital filter. The available widths range from 4 bits to 11 bits.
NFEN
[15:0]) that sets the data transmission rate (baud rate) of the LIN-UART. The LIN-
=
0
) or included (
TEN
bit may be asserted, transmit activity may occur).
NFEN
NFCTL[2:0]
=
=
NFEN = 1
UART Baud Rate Divisor Value
) input selects whether the noise filter is bypassed
16 x UART Baud Rate Divisor Value
System Clock Frequency (Hz)
System Clock Frequency (Hz)
) input selects the width of the up/down saturating
) in the receive data path.
REN
Z8FMC16100 Series Flash MCU
bit in the LIN-UART Control 0
LIN-UART Baud Rate Generator
Product Specification
125