Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 157

KIT DEV FOR Z8 ENCORE Z8FMC16100

Z8FMC160100KITG

Manufacturer Part Number
Z8FMC160100KITG
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphical User Interface
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4660
PS024613-0910
Baud Rate
IR_RxD
UART’s
Caution:
Clock
RxD
Receiving IrDA Data
Data received from the infrared transceiver via the IR_RXD signal through the
decoded by the infrared endec and passed to the UART. The UART’s baud rate clock is
used by the infrared endec to generate the demodulated signal (RXD) which drives the
UART. Each UART/Infrared data bit is 16-clocks wide.
reception. When the infrared endec is enabled, the UART’s RXD signal is internal to the
Z8FMC16100 Series Flash MCU while the IR_RXD signal is received through the
pin.
The system clock frequency must be at least 1.0 MHz to ensure proper reception of the
1.6 µs minimum-width pulses allowed by the IrDA standard.
Endec Receiver Synchronization
The IrDA receiver uses a local baud rate clock counter (0 to 15 clock periods) to generate
an input stream for the UART and to create a sampling window for detection of incoming
pulses. The generated UART input (UART RXD) is delayed by 8 baud rate clock periods
with respect to the incoming IrDA data stream. When a falling edge in the input data
stream is detected, the endec counter is reset. When the count reaches a value of 8, the
UART RXD value is updated to reflect the value of the decoded data. When the count
reaches 12 baud clock periods, the sampling window for the next incoming pulse opens.
The window remains open until the count again reaches 8 (or in other words 24 baud clock
periods since the previous pulse was detected) giving the endec a sampling window of
minus four baud rate clocks to plus eight baud rate clocks around the expected time of an
8-Clock
Delay
Start Bit = 0
16-Clock
Period
Min. 1.6 s
Pulse
Start Bit = 0
16-Clock
Period
Figure 21. Infrared Data Reception
Data Bit 0 = 1
Data Bit 0 = 1
16-Clock
Period
Data Bit 1 = 0
Data Bit 1 = 0
16-Clock
Period
Z8FMC16100 Series Flash MCU
Data Bit 2 = 1
Figure 21
Data Bit 2 = 1
Product Specification
16-Clock
Period
Data Bit 3 = 1
Receiving IrDA Data
displays the data
Data Bit 3 = 1
RXD
pin is
RXD
145

Related parts for Z8FMC160100KITG