Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 49

• Manufacturer Part Number: Z8FMC160100KITG
• Description: KIT DEV FOR Z8 ENCORE Z8FMC16100
• Manufacturer: Zilog
• Series: Z8 Encore! MC™r

Specifications of Z8FMC160100KITG

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: Z8FMC16100
• Primary Attributes: 3-Ph DC Motors
• Secondary Attributes: Graphical User Interface
• For Use With: 269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4660

Table 13. Port Alternate Function Mapping (Continued)
PS024613-0910
Port
Port B
Port C
GPIO Interrupts
Pin
PB2
PB1
PB0
PC0
Many GPIO port pins can be used as interrupt sources. The Port A[7:0] pins can be config-
ured to generate an interrupt request on either the rising edge or falling edge of the pin input
signal. The Port B[3:0] pins can be configured to generate an interrupt request on both the
rising and falling edges of the pin input signal. For Port A, the GPIO interrupt edge selection
is controlled by the Interrupt Edge Select subregister. Enabling and disabling of the Port
Interrupts is handled in the Interrupt Controller. Port B[3:0], with dual edge interrupt capa-
bility, is selected by AF1, AF0. For more information, see
Mnemonic
PB2
PB2INT
ANA2
T0IN2
PB1
PB1INT
ANA1
PB0
PB0INT
ANA0
PC0
T0OUT
AF0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
AF1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Alternate Function Description
GPIO/Timer 0 input 2.
GPIO/Timer 0 input 2— edge interrupt
enabled.
ADC analog input 2.
Timer 0 input 2; dedicated input.
GPIO/Timer 0 input 1.
GPIO/Timer 0 input 1— edge interrupt
enabled.
ADC analog input 1.
Reserved; do not use.
GPIO/Timer 0 input 0.
GPIO/Timer 0 input 0— edge interrupt
enabled.
ADC analog input 0.
Reserved; do not use.
GPIO.
Reserved; do not use.
Timer 0 output.
Reserved; do not use.
Z8FMC16100 Series Flash MCU
Interrupt Controller
Product Specification
GPIO Interrupts
on page 49.
37