UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 170

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

168
(3) Example of setting procedure when stopping the internal high-speed oscillation clock
<2> Setting the internal high-speed oscillation clock as the source clock of the CPU/peripheral hardware clock
The internal high-speed oscillation clock can be stopped in the following two ways.
• Executing the STOP instruction
• Setting HIOSTOP to 1
(a) To execute a STOP instruction
(b) To stop internal high-speed oscillation clock by setting HIOSTOP to 1
<1> Setting of peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after STOP mode is released
<3> Executing the STOP instruction
<1> Confirming the CPU clock status (CKC register)
Caution If switching the CPU/peripheral hardware clock from the high-speed system clock to the
and setting the division ratio of the set clock (CKC register)
CLS
MCM0
0
0
1
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 17 STANDBY FUNCTION).
If the X1 clock oscillates before the STOP mode is entered, set the value of the OSTS register before
executing the STOP instruction.
When the STOP instruction is executed, the system is placed in the STOP mode and internal high-
speed oscillation clock is stopped.
When CLS = 0 and MCS = 0, the internal high-speed oscillation clock is supplied to the CPU, so
change the CPU clock to the high-speed system clock or subsystem clock.
Confirm with CLS and MCS that the CPU is operating on a clock other than the internal high-speed
oscillation clock.
0
If the switching is made immediately after the internal high-speed oscillation clock is
internal high-speed oscillation clock after restarting the internal high-speed oscillation
clock, do so after 10
restarted, the accuracy of the internal high-speed oscillation cannot be guaranteed for
10
μ
MCS
MDIV2
s.
×
0
1
0
0
0
0
1
1
Internal high-speed oscillation clock
High-speed system clock
Subsystem clock
MDIV1
CHAPTER 5 CLOCK GENERATOR
0
0
1
1
0
0
μ
User’s Manual U17854EJ9V0UD
s or more have elapsed.
MDIV0
0
1
0
1
0
1
f
f
f
f
f
f
CPU Clock Status
IH
IH
IH
IH
IH
IH
/2
/2
/2
/2
/2
2
3
4
5
Selection of CPU/Peripheral
Hardware Clock (f
CLK
)