UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 652

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
650
Note A flowchart is shown on the next page.
Remarks 1. n: Channel number (n = 0 to 7)
2. If bit 2 (LVISEL) of the low voltage detection register (LVIM) is set to “1”, the meanings of the above
No
words change as follows.
• Supply voltage (V
• Detection voltage (V
Figure 20-11. Example of Software Processing After Reset Release (1/2)
Restarting timer array unit
Setting timer array unit
(TT0n = 1 → TS0n = 1)
(to measure 50 ms)
50 ms has passed?
voltage or higher
processing <1>
processing <2>
Clearing WDT
(TMIF0n = 1?)
Initialization
Initialization
(LVIF = 0?)
Setting LVI
Detection
Reset
No
Yes
LVI reset
DD
CHAPTER 20 LOW-VOLTAGE DETECTOR
)
LVI
) → Detection voltage (V
Yes
→ Input voltage from external input pin (EXLVI)
User’s Manual U17854EJ9V0UD
;
; Setting of detection level by LVIS.
; f
; Initial setting for port.
; The timer counter is cleared and the timer is started.
Check the reset source, etc.
The low-voltage detector operates (LVION = 1).
Source: f
Timer starts (TS0n = 1).
Setting of division ratio of system clock,
such as setting of timer or A/D converter.
CLK
= Internal high-speed oscillation clock (8.4 MHz (MAX.)) (default)
Where comparison value = 102: ≅ 50 ms
CLK
(8.4 MHz (MAX.))/2
EXLVI
Note
= 1.21 V)
12
,