UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 393

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 11-47. Flowchart of Master Transmission/Reception (in Continuous Transmission/Reception Mode)
Caution
Remark
Writing 1 to MD0n0 bit
<1> to <8> in the figure correspond to <1> to <8> in Figure 11-46 Timing Chart of Master
Transmission/Reception (in Continuous Transmission/Reception Mode).
After setting the PER0 register to 1, be sure to set the SPS0 register after 4 or more clocks
have elapsed.
<3>
<6>
Yes
No
SMR0n, SCR0n:
SDR0n[15:9]:
SO0, SOE0:
<2>
<4>
<5>
<7>
<8>
CHAPTER 11 SERIAL ARRAY UNIT
Clearing SAU1EN and SAU0EN
Setting SAU1EN and SAU0EN
Reading receive data from
Reading receive data from
Setting operation clock by
User’s Manual U17854EJ9V0UD
Starting CSI communication
Clearing 0 to MD0n0 bit
Writing transmit data to
End of communication
bits of PER0 register to 1
Communication continued?
bits of PER0 register to 0
Writing 1 to SS0n bit
SIOp (=SDR0n[7:0])
SIOp (=SDR0n[7:0])
SIOp (=SDR0n[7:0])
Writing 1 to ST0n bit
Communication data
Port manipulation
Buffer empty interrupt
Transfer end interrupt
SPS0 register
Setting communication
Setting transfer rate
Setting output and SCKp output
No
TSF0n = 1?
Yes
Yes
generated?
generated?
exists?
Yes
No
No
No
Yes
Perform initial setting when SE0n = 0.
<1> Select the buffer empty interrupt.
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