EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 108

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EP2AGX65DF29I5N

Manufacturer Part Number
EP2AGX65DF29I5N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX65DF29I5N

Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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5–4
Figure 5–2. GCLK Networks in Arria II GZ Devices
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Regional Clock Networks
CLK[0..3]
For Arria II devices, the RCLK networks only pertain to the quadrant they drive into.
RCLK networks provide the lowest clock delay and skew for logic contained in a
single device quadrant. Arria II IOEs and internal logic in a given quadrant can also
drive RCLKs to create internally generated RCLKs and other high fan-out control
signals; for example, synchronous or asynchronous clears and clock enables.
Figure 5–3
Arria II devices.
L2
L3
GCLK[0..3]
and
Figure 5–4
C
show CLK pins and PLLs that can drive RCLK networks in
GCLK[12..15]
GCLK[4..7]
LK[1
CLK[4..7]
T1 T2
B1 B2
2..15]
Chapter 5: Clock Networks and PLLs in Arria II Devices
GCLK[8..11]
R2
R3
December 2010 Altera Corporation
Clock Networks in Arria II Devices
CLK[8..11]

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