EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 286

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

9–6
Arria II Device Handbook Volume 1: Device Interfaces and Integration
V
CCPD
Pins
Arria II devices have a dedicated programming power supply, the V
Table 9–5
Table 9–5. Power Supply for Arria II Devices
For more information about configuration pins power supply, refer to
Configuration Pins” on page
Arria II GX
Arria II GZ
Devices
lists the power supply for Arria II devices.
V
HSTL/SSTL input buffers, and MSEL[3..0] pins.
V
voltage level within 100 ms when PORSEL is low or 4 ms when PORSEL is high. If
these supplies are not ramped up in this specified time, your Arria II GX device
will not configure successfully. If the system cannot ramp up the power supplies
within 100 ms or 4 ms, you must hold nCONFIG low until all the power supplies
are stable.
You must connect V
■
■
■
V
I/O pins (TCK, TMS, TDI, TDO, and TRST).
V
100 ms when PORSEL is low or 4 ms when PORSEL is high. If these supplies are
not ramped up in this specified time, your Arria II GZ device will not configure
successfully. If the system cannot ramp up the power supplies within 100 ms or
4 ms, you must hold nCONFIG low until all the power supplies are stable.
V
■
■
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
CCPD
CCPD
CCPD
CCPD
CCPD
For 3.3-V I/O standards, connect V
For 3.0-V I/O standards, connect V
For 2.5-V and below I/O standards, connect V
If the V
3.0 V.
If the V
up to 2.5 V.
and V
must be connected to 3.3, 3.0, or 2.5 V to power the I/O pre-drivers,
must be connected to 3.0 or 2.5 V to power the I/O pre-drivers and JTAG
and V
must be greater than or equal to V
CCIO
CCIO
CCIO
CCPGM
of the bank is powered to 3.0 V, V
of the bank is powered to 2.5 V or lower, V
9–39.
for I/O banks 3C and 8C must ramp up from 0 V to the desired
must ramp up from 0 V to the desired voltage level within
CCPD
according to the I/O standard used in the same bank:
Programming Power Supply
Power-On Reset Circuit and Configuration Pins Power Supply
CCPD
CCPD
CCIO
to 3.3 V.
to 3.0 V.
of the same bank:
CCPD
CCPD
December 2010 Altera Corporation
must be powered up to
to 2.5 V.
CCPD
CCPD
must be powered
“Device
pins.