EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 433
EP2AGX65DF29I5N
Manufacturer Part Number
EP2AGX65DF29I5N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX65DF29I5N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Manufacturer:
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Chapter 1: Transceiver Architecture in Arria II Devices
Calibration Block
Calibration Block
December 2010 Altera Corporation
This block calibrates the OCT resistors and the analog portions of the transceiver
blocks to ensure that the functionality is independent of process, voltage, or
temperature (PVT) variations.
and how it is connected to the transceiver blocks in Arria II GX devices.
Figure 1–47. Arria II GX Transceiver Calibration Blocks Location and Connection
Notes to
(1) You must connect a separate 2 k(tolerance max ± 1%) external resistor on each RREF pin in the Arria II device to
(2) The Quartus II software automatically selects the appropriate calibration block based on the pin assignments of the
(3) For RREF pin information, refer to the
(3)
GND. To ensure proper operation of the calibration block, the RREF resistor connection in the board must be free from
external noise.
transceiver tx_dataout and rx_datain pins.
Figure
1–47:
2KΩ
2KΩ
Figure 1–47
Device Pin Connection
Calibration
Calibration
Block L1
Block L0
GXBL3
GXBL2
GXBL1
GXBL0
shows the location of the calibration block
Guidelines.
Arria II Device Handbook Volume 2: Transceivers
Arria II GX
Device
(Note
1), (2),
1–47
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