EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 530

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EP2AGX65DF29I5N

Manufacturer Part Number
EP2AGX65DF29I5N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX65DF29I5N

Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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2–40
Arria II Device Handbook Volume 2: Transceivers
Table 2–11
editor.
Table 2–11. Quartus II Assignments for Arria II Devices
From
To
Assignment Name
Value
Note to
(1) You can find the full hierarchy name of the 0 PPM clock driver using the Node Finder feature in the Quartus II
Assignment Editor.
Assignment
Table
lists the Quartus II assignments that you must make in the assignment
2–11:
Full design hierarchy name of one of the following clock drivers that you
choose to drive the tx_coreclk ports of all identical channels (1):
tx_dataout pins of all identical channels whose tx_coreclk ports are
connected together and driven by the 0 PPM clock driver.
GXB 0 PPM Core Clock Setting
ON
tx_clkout
coreclkout
FPGA CLK input pins
Transceiver REFCLK pins
Clock output from left corner PLLs
Chapter 2: Transceiver Clocking in Arria II Devices
Description
FPGA Fabric-Transceiver Interface Clocking
December 2010 Altera Corporation

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