EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 78

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

4–6
Figure 4–4. Output Cascading Feature for FIR Structures
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Input
Data
Half-DSP Block
144
The combination of a fast, low-latency four-multiplier adder unit and the “chained
cascade” capability of the output chaining adder provides the optimal FIR and vector
multiplication capability.
To support single-channel type FIR filters efficiently, you can configure one of the
multiplier input registers to form a tap delay line input, saving resources and
providing higher system performance.
Figure 4–4
of commonly found arithmetic rounding and saturation functions in signal
processing.
In addition to the independent multipliers and sum modes, you can use DSP blocks to
perform shift operations. DSP blocks can dynamically switch between logical shift
left/right, arithmetic shift left/right, and rotation operation in one clock cycle.
shows the optional rounding and saturation unit. This unit provides a set
From Previous Half-DSP Block
To Next
Half-DSP Block
44
44
Chapter 4: DSP Blocks in Arria II Devices
December 2010 Altera Corporation
Simplified DSP Operation
44
Result[]