EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 471

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 1: Transceiver Architecture in Arria II Devices
Test Modes
Test Modes
Figure 1–81. Serial Loopback Datapath
December 2010 Altera Corporation
Fabric
FPGA
Serial Loopback
1
Arria II GX and GZ devices provide various loopback options, pattern generators, and
verifiers that allow you to ensure the working of different functional blocks in the
transceiver channel. These modes include:
■
■
■
■
■
If you generate a Transmitter-only or Receiver-only configuration and enable
loopback mode, you will have an extra port that you must connect to the transceiver’s
counterpart port. These ports are described in
list).
This option is available for all functional modes except PCIe mode.
the datapath for serial loopback.
The data from the FPGA fabric passes through the transmitter channel and loops back
to the receiver channel, bypassing the receiver input buffer. The received data is
available to the FPGA logic for verification. Using this option, you can check the
operation for all enabled PCS and PMA functional blocks in the transmitter and
receiver channels.
When you enable the serial loopback option, the ALTGX MegaWizard Plug-In
Manager provides the rx_seriallpbken port to dynamically enable serial loopback on
a channel-by-channel basis when the signal is asserted high.
Serial loopback
Reverse serial loopback
Reverse serial pre-CDR loopback
PCIe reverse parallel loopback
BIST and PRBS Modes
Compensation
wrclk
TX Phase
FIFO
rdclk
wrclk
Byte Serializer
Receiver Channel PCS
Transmitter Channel PCS
rdclk
8B/10B Encoder
Table 1–30 on page 1–98
Arria II Device Handbook Volume 2: Transceivers
Figure 1–81
(the PMA port
Transmitter Channel
Receiver Channel
Serial Loopback
PMA
PMA
shows
1–85