EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 354

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

10–4
Table 10–2. Fault Injection Register for Arria II Devices
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Content
Note to
(1) Bit[20] and Bit[19] cannot both be set to 1, as this is not a valid selection. The error detection circuitry decodes this as no error injection.
Description
Table
Automated Single Event Upset Detection
10–2:
Bit[20] Bit[19]
1
Error Type
0
1
0
You can introduce a single error or double errors adjacent to each other to the
configuration memory. This provides an extra way to facilitate design verification and
system fault tolerance characterization. Use the JTAG fault injection register with the
EDERROR_INJECT JTAG instruction to flip the readback bits. The Arria II device is then
forced into error test mode. Altera recommends reconfiguring the device after the test
completes.
You can only introduce error injection in the first data frame, but you can monitor the
error information at any time. For more information about the JTAG fault injection
register and fault injection register, refer to
Table 10–2
injection for Arria II devices.
Arria II devices offer on-chip circuitry for automated SEU detection. Some
applications require the device to operate error-free in high-neutron flux
environments require periodic checks to ensure continued data integrity. The error
detection CRC feature ensures data reliability and is one of the best options for
mitigating SEU.
You can implement the error detection CRC feature with existing circuitry in Arria II
devices, eliminating the need for external logic. The CRC_ERROR pin reports a CRC
error when configuration RAM data is corrupted; you must decide whether to
reconfigure the device or to ignore the error.
1
0
0
(1)
Single error injection
Double-adjacent error injection
No error injection
Bit[20..19]
lists how the fault injection register is implemented and describes error
Error Injection Type
Depicts the location of the
injected error in the first
data frame.
Byte Location of the
“Error Detection Registers” on page
Injected Error
Bit[18..8]
Chapter 10: SEU Mitigation in Arria II Devices
December 2010 Altera Corporation
Depicts the location of the
bit error and corresponds
to the error injection type
selection.
Error Byte Value
User Mode Error Detection
Bit[7..0]
10–6.