EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 171

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: I/O Features in Arria II Devices
I/O Structure
December 2010 Altera Corporation
3.3-V I/O Interface
External Memory Interfaces
f
f
Arria II I/O buffers support 3.3-V I/O standards. You can use them as transmitters or
receivers in your system. The output high voltage (V
input high voltage (V
standard specifications defined by EIA/JEDEC Standard JESD8-B with margin when
the V
for Arria II GZ devices.
To ensure device reliability and proper operation when interfacing a 3.3-V I/O system
with Arria II devices, do not exceed the absolute maximum ratings. Altera
recommends performing IBIS simulation to determine that the overshoot and
undershoot voltages are within the guidelines.
When you use the Arria II device as a transmitter, techniques to limit overshoot and
undershoot at the I/O pins include using slow slew rate and series termination.
Transmission line effects that cause large voltage deviations at the receiver are
associated with an impedance mismatch between the driver and transmission line. By
matching the impedance of the driver to the characteristic impedance of the
transmission line, you can significantly reduce overshoot voltage. You can use a series
termination resistor placed physically close to the driver to match the total driver
impedance to transmission line impedance. Other than 3.3-V LVTTL and 3.3-V
LVCMOS I/O standards, Arria II devices support R
I/O standards in all I/O banks.
When you use the Arria II device as a receiver, use a clamping diode (on-chip or
off-chip) to limit overshoot. Arria II devices provide an optional on-chip PCI clamp
diode for I/O pins. You can use this diode to protect I/O pins against overshoot
voltage.
Another method for limiting overshoot is to use a 3.0-V V
this method, the clamp diode (on-chip or off-chip), can sufficiently clamp overshoot
voltage to in the DC- and AC-input voltage specification. The clamped voltage can be
expressed as the sum of the supply voltage (V
using the V
standards, including 3.3-V LVTTL/LVCMOS, 3.0-V LVTTL/LVCMOS, and 3.0-V
PCI/PCI-X. Additionally, lowering V
For more information about absolute maximum rating and maximum allowed
overshoot during transitions, refer to the
In addition to I/O registers in each IOE, Arria II devices also have dedicated registers
and phase-shift circuitry on all I/O banks for interfacing with external memory
interfaces.
For more information about external memory interfaces, refer to the
Interfaces in Arria II Devices
CCIO
voltage is powered by 3.3 V or 3.0 V for Arria II GX devices and 3.0 V only
CCIO
at 3.0 V, you can reduce overshoot and undershoot for all I/O
IH
), and input low voltage (V
chapter.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
CCIO
Arria II Devices Data
to 3.0 V reduces power consumption.
CCIO
) and the diode forward voltage. By
IL
S
) levels meet the 3.3-V I/O
OH
OCT for all LVTTL/LVCMOS
), output low voltage (V
CCIO
bank supply voltage. In
Sheet.
External Memory
OL
),
6–13