EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 193

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: I/O Features in Arria II Devices
Design Considerations
Design Considerations
December 2010 Altera Corporation
I/O Termination
Although Arria II devices feature various I/O capabilities for high-performance and
high-speed system designs, there are several other design considerations that require
your attention to ensure the success of your designs.
This section describes I/O termination requirements for single-ended and differential
I/O standards.
Single-Ended I/O Standards
Although single-ended, non-voltage-referenced I/O standards do not require
termination, impedance matching is necessary to reduce reflections and improve
signal integrity.
Voltage-referenced I/O standards require both an input reference voltage (V
termination voltage (V
termination voltage of the transmitting device. Each voltage-referenced I/O standard
requires a specific termination setup. For example, a proper resistive signal
termination scheme is critical in SSTL2 standards to produce a reliable DDR memory
system with a superior noise margin.
Arria II R
optimizing OCT for use in typical transmission line environments, the R
impedance must be equal to or less than the transmission line impedance for optimal
performance. In ideal applications, setting the R
transmission line impedance avoids reflections. You can also use external pull-up
resistors to terminate the voltage-referenced I/O standards such as SSTL and HSTL
I/O standards.
Differential I/O Standards
Differential I/O standards typically require a termination resistor between the two
signals at the receiver. The termination resistor must match the differential load
impedance of the signal line. Arria II devices provide an optional differential on-chip
resistor when you use LVDS.
S
OCT provides the convenience of not using external components. When
TT
). The reference voltage of the receiving device tracks the
Arria II Device Handbook Volume 1: Device Interfaces and Integration
S
OCT impedance to match the
S
OCT
R EF
) and a
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