PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 103

7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI

PIC12F1840-I/P

Manufacturer Part Number
PIC12F1840-I/P
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC12F1840-I/P

Processor Series
PIC12F
Core
PIC
Program Memory Type
Flash
Program Memory Size
7 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-8
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F1840-I/P
Manufacturer:
MICROCHIP
Quantity:
200
After the “BSF EECON1,WR” instruction, the processor
requires two cycles to set up the write operation. The
user must place two NOP instructions after the WR bit is
set. The processor will halt internal operations for the
typical 2 ms, only during the cycle in which the write
takes place (i.e., the last word of the block write). This
is not Sleep mode as the clocks and peripherals will
FIGURE 11-2:
 2011 Microchip Technology Inc.
EEADRL<4:0> = 00000
First word of block
to be written
Buffer Register
BLOCK WRITES TO FLASH PROGRAM MEMORY WITH 32 WRITE LATCHES
14
EEADRL<4:0> = 00001
7
Buffer Register
5
EEDATH
Preliminary
6
14
Program Memory
EEADRL<4:0> = 00010
0 7
continue to run. The processor does not stall when
LWLO = 1, loading the write latches. After the write
cycle, the processor will resume operation with the third
instruction after the EECON1 write instruction.
EEDATA
Buffer Register
8
14
PIC12(L)F1840
EEADRL<4:0> = 11111
0
Buffer Register
Last word of block
DS41441B-page 103
to be written
14

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