PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 159

• Manufacturer Part Number: PIC12F1840-I/P
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
• Manufacturer: Microchip Technology

Specifications of PIC12F1840-I/P

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 20-1
20.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
20.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the TMR0CS bit of the OPTION
register.
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
FIGURE 20-1:
 2011 Microchip Technology Inc.
From CPSCLK
Note:
T0CKI
F
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
The value written to the TMR0 register
can be adjusted, in order to account for
the two instruction cycle delay when
TMR0 is written.
is a block diagram of the Timer0 module.
T0XCS
0
1
TMR0SE
BLOCK DIAGRAM OF THE TIMER0
TMR0CS
0
1
Preliminary
Prescaler
8-bit
8
PS<2:0>
20.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin or the
Capacitive Sensing Oscillator (CPSCLK) signal.
8-Bit Counter mode using the T0CKI pin is selected by
setting the TMR0CS bit in the OPTION register to ‘1’
and resetting the T0XCS bit in the CPSCON0 register to
‘0’.
8-Bit Counter mode using the Capacitive Sensing
Oscillator (CPSCLK) signal is selected by setting the
TMR0CS bit in the OPTION register to ‘1’ and setting
the T0XCS bit in the CPSCON0 register to ‘1’.
The rising or falling transition of the incrementing edge
for either input source is determined by the TMR0SE bit
in the OPTION register.
8-BIT COUNTER MODE
PSA
1
0
PIC12(L)F1840
2 T
Sync
CY
Set Flag bit TMR0IF
DS41441B-page 159
Overflow to Timer1
on Overflow
Data Bus
8
TMR0