PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 317

7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI

PIC12F1840-I/P

Manufacturer Part Number
PIC12F1840-I/P
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC12F1840-I/P

Processor Series
PIC12F
Core
PIC
Program Memory Type
Flash
Program Memory Size
7 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-8
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F1840-I/P
Manufacturer:
MICROCHIP
Quantity:
200
MOVWI
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2011 Microchip Technology Inc.
Mode
Preincrement
Predecrement
Postincrement
Postdecrement
Move W to INDFn
[ label ] MOVWI ++FSRn
[ label ] MOVWI --FSRn
[ label ] MOVWI FSRn++
[ label ] MOVWI FSRn--
[ label ] MOVWI k[FSRn]
n  [0,1]
mm  [00,01, 10, 11]
-32  k  31
W  INDFn
Effective address is determined by
• FSR + 1 (preincrement)
• FSR - 1 (predecrement)
• FSR + k (relative offset)
After the Move, the FSR value will be
either:
• FSR + 1 (all increments)
• FSR - 1 (all decrements)
Unchanged
This instruction is used to move data
between W and one of the indirect
registers (INDFn). Before/after this
move, the pointer (FSRn) is updated by
pre/post incrementing/decrementing it.
Note: The INDFn registers are not
physical registers. Any instruction that
accesses an INDFn register actually
accesses the register at the address
specified by the FSRn.
FSRn is limited to the range 0000h -
FFFFh. Incrementing/decrementing it
beyond these bounds will cause it to
wrap-around.
The increment/decrement operation on
FSRn WILL NOT affect any Status bits.
None
Syntax
FSRn++
FSRn--
++FSRn
--FSRn
mm
00
01
10
11
Preliminary
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Description:
RESET
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC12(L)F1840
Load OPTION_REG Register
with W
[ label ] OPTION
None
(W)  OPTION_REG
None
Move data from W register to
OPTION_REG register.
Software Reset
[ label ] RESET
None
Execute a device Reset. Resets the
nRI flag of the PCON register.
None
This instruction provides a way to
execute a hardware Reset by soft-
ware.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
NOP
NOP
DS41441B-page 317

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