PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 24

• Manufacturer Part Number: PIC12F1840-I/P
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
• Manufacturer: Microchip Technology

Specifications of PIC12F1840-I/P

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12(L)F1840
TABLE 3-7:
DS41441B-page 24
000h
001h
002h
003h
004h
005h
006h
007h
008h
009h
00Ah
00Bh
00Ch
00Dh
00Eh
00Fh
010h
011h
012h
013h
014h
015h
016h
017h
018h
019h
01Ah
01Bh
01Ch
01Dh
01Eh
01Fh
Legend:
Note
Address
Bank 0
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1: These registers can be addressed from any bank.
2: PIC12F1840 only.
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
PORTA
—
—
—
—
PIR1
PIR2
—
—
TMR0
TMR1L
TMR1H
T1CON
T1GCON
TMR2
PR2
T2CON
—
CPSCON0
CPSCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer0 Module Register
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Timer2 Period Register
Unimplemented
TMR1CS1
TMR1GIF
TMR1GE
CPSON
OSFIF
Bit 7
GIE
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
TMR1CS0
T1GPOL
CPSRM
Bit 6
PEIE
ADIF
—
—
—
—
—
TMR0IE
T1GTM
RCIF
Bit 5
C1IF
RA5
T2OUTPS<3:0>
—
—
—
—
T1CKPS<1:0>
Preliminary
T1GSPM
INTE
EEIF
Bit 4
TXIF
RA4
TO
—
—
T1OSCEN
T1GGO/
SSP1IF
BCL1IF
DONE
IOCIE
Bit 3
RA3
PD
CPSRNG<1:0>
—
BSR<4:0>
TMR2ON
T1SYNC
T1GVAL
TMR0IF
CCP1IF
Bit 2
RA2
—
—
Z
CPSOUT
TMR2IF
Bit 1
INTF
 2011 Microchip Technology Inc.
RA1
DC
—
—
T2CKPS<1:0>
CPSCH<1:0>
T1GSS<1:0>
TMR1ON 0000 00-0 uuuu uu-u
TMR1IF
T0XCS
IOCIF
Bit 0
RA0
—
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
--xx xxxx --xx xxxx
0000 0000 0000 0000
0-00 0--- 0-00 0---
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0x00 uuuu uxuu
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
00-- 0000 00-- 0000
---- --00 ---- --00
POR, BOR
Value on
—
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
—