PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 319

• Manufacturer Part Number: PIC12F1840-I/P
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
• Manufacturer: Microchip Technology

Specifications of PIC12F1840-I/P

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2011 Microchip Technology Inc.
Rotate Right f through Carry
[ label ]
0  f  127
d  [0,1]
See description below
C
The contents of register ‘f’ are rotated
one bit to the right through the Carry
flag. If ‘d’ is ‘0’, the result is placed in
the W register. If ‘d’ is ‘1’, the result is
placed back in register ‘f’.
Enter Sleep mode
[ label ]
None
00h  WDT,
0  WDT prescaler,
1  TO,
0  PD
TO, PD
The power-down Status bit, PD is
cleared. Time-out Status bit, TO is
set. Watchdog Timer and its pres-
caler are cleared.
The processor is put into Sleep mode
with the oscillator stopped.
C
RRF f,d
SLEEP
Register f
Preliminary
SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBWFB
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC12(L)F1840
Subtract W from f
[ label ]
0 f 127
d  [0,1]
(f) - (W) destination)
C, DC, Z
Subtract (2’s complement method) W
register from register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f.
Subtract W from literal
[ label ]
0 k 255
k - (W) W)
C, DC, Z
The W register is subtracted (2’s com-
plement method) from the eight-bit
literal ‘k’. The result is placed in the W
register.
C = 0
C = 1
DC = 0
DC = 1
C = 0
C = 1
DC = 0
DC = 1
SUBWFB
0  f  127
d  [0,1]
(f) – (W) – (B) dest
C, DC, Z
Subtract W and the BORROW flag
(CARRY) from register ‘f’ (2’s comple-
ment method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Subtract W from f with Borrow
SUBWF f,d
SUBLW k
W  f
W  f
W<3:0>  f<3:0>
W<3:0>  f<3:0>
W  k
W  k
W<3:0>  k<3:0>
W<3:0>  k<3:0>
f {,d}
DS41441B-page 319