PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 144

• Manufacturer Part Number: PIC12F1840-I/P
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
• Manufacturer: Microchip Technology

Specifications of PIC12F1840-I/P

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12(L)F1840
REGISTER 17-1:
REGISTER 17-2:
TABLE 17-1:
DS41441B-page 144
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-5
bit 4-0
FVRCON
DACCON0
DACCON1
Legend:
R/W-0/0
DACEN
Name
U-0
—
— = unimplemented, read as ‘0’. Shaded cells are unused by the DAC module.
DACEN: DAC Enable bit
1 =
0 =
DACLPS: DAC Low-Power Voltage State Select bit
1
0 =
DACOE: DAC Voltage Output Enable bit
1 =
0
Unimplemented: Read as ‘0’
DACPSS<1:0>: DAC Positive Source Select bits
00 =
01
10 = FVR Buffer2 output
11
Unimplemented: Read as ‘0’
DACNSS: DAC Negative Source Select bits
1
0 =
Unimplemented: Read as ‘0’
DACR<4:0>: DAC Voltage Output Select bits
DACEN
FVREN
SUMMARY OF REGISTERS ASSOCIATED WITH THE DAC MODULE
Bit 7
= DAC Positive reference source selected
= DAC voltage level is disconnected from the DACOUT pin
= V
DACLPS
—
R/W-0/0
= V
= Reserved, do not use
DAC is enabled
DAC is disabled
DAC Negative reference source selected
DAC voltage level is also an output on the DACOUT pin
V
U-0
—
REF
SS
DACCON0: VOLTAGE REFERENCE CONTROL REGISTER 0
V
DACCON1: VOLTAGE REFERENCE CONTROL REGISTER 1
REF
DD
-
pin
FVRRDY
DACLPS
Bit 6
—
W = Writable bit
‘0’ = Bit is cleared
W = Writable bit
‘0’ = Bit is cleared
x = Bit is unknown
x = Bit is unknown
R/W-0/0
DACOE
U-0
—
DACOE
TSEN
Bit 5
—
R/W-0/0
U-0
Preliminary
—
TSRNG
DACR4
Bit 4
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CDAFVR1
DACPSS1
R/W-0/0
R/W-0/0
DACR3
Bit 3
DACPSS<1:0>
CDAFVR0
DACPSS0
DACR2
Bit 2
DACR<4:0>
R/W-0/0
R/W-0/0
ADFVR1
DACR1
Bit 1
 2011 Microchip Technology Inc.
—
R/W-0/0
U-0
—
ADFVR0
DACR0
Bit 0
—
DACNSS
R/W-0/0
R/W-0/0
Register
on page
124
144
144
bit 0
bit 0