PIC12F1840-I/P Microchip Technology, PIC12F1840-I/P Datasheet - Page 194

• Manufacturer Part Number: PIC12F1840-I/P
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 PDI
• Manufacturer: Microchip Technology

Specifications of PIC12F1840-I/P

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12(L)F1840
24.3
Pulse-Width Modulation (PWM) is a scheme that
provides power to a load by switching quickly between
fully on and fully off states. The PWM signal resembles
a square wave where the high portion of the signal is
considered the on state and the low portion of the signal
is considered the off state. The high portion, also known
as the pulse width, can vary in time and is defined in
steps. A larger number of steps applied, which
lengthens the pulse width, also supplies more power to
the load. Lowering the number of steps applied, which
shortens the pulse width, supplies less power. The
PWM period is defined as the duration of one complete
cycle or the total amount of on and off time combined.
PWM resolution defines the maximum number of steps
that can be present in a single PWM period. A higher
resolution allows for more precise control of the pulse
width time and in turn the power that is applied to the
load.
The term duty cycle describes the proportion of the on
time to the off time and is expressed in percentages,
where 0% is fully off and 100% is fully on. A lower duty
cycle corresponds to less power applied and a higher
duty cycle corresponds to more power applied.
Figure 24-3
signal.
24.3.1
The standard PWM mode generates a Pulse-Width
modulation (PWM) signal on the CCP1 pin with up to 10
bits of resolution. The period, duty cycle, and resolution
are controlled by the following registers:
• PR2 registers
• T2CON registers
• CCPR1L registers
• CCP1CON registers
Figure 24-4
operation.
DS41441B-page 194
Note 1: The corresponding TRIS bit must be
2: Clearing the CCP1CON register will
PWM Overview
STANDARD PWM OPERATION
shows a simplified block diagram of PWM
cleared to enable the PWM output on the
CCP1 pin.
relinquish control of the CCP1 pin.
shows a typical waveform of the PWM
Preliminary
FIGURE 24-3:
FIGURE 24-4:
Note 1:
CCPR1H
Duty Cycle Registers
Comparator
2:
Pulse Width
CCPR1L
TMR2 = 0
PR2
TMR2
Comparator
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (F
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPR1H is a read-only register.
(2)
Period
(Slave)
(1)
CCP1 PWM OUTPUT
SIGNAL
SIMPLIFIED PWM BLOCK
DIAGRAM
Clear Timer,
toggle CCP1 pin and
latch duty cycle
TMR2 = CCPR1H:CCP1CON<5:4>
 2011 Microchip Technology Inc.
CCP1CON<5:4>
TMR2 = PR2
S
R
Q
TRIS
OSC
CCP1
), or