S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 214

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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S12S Debug Module (S12SDBGV2)
each trace buffer entry. In Detail mode CINF comprises of R/W and size access information (CRW and
CSZ respectively).
Single byte data accesses in Detail Mode are always stored to the low byte of the trace buffer (DATAL)
and the high byte is cleared. When tracing word accesses, the byte at the lower address is always stored to
trace buffer byte1 and the byte at the higher address is stored to byte0.
6.4.5.3.1
The format of the bits is dependent upon the active trace mode as described below.
Field2 Bits in Detail Mode
In Detail Mode the CSZ and CRW bits indicate the type of access being made by the CPU.
214
ADDR[17]
ADDR[16]
CRW
CSZ
Normal/Loop1
Bit
Detail Mode
3
2
1
0
Modes
Mode
Access Type Indicator— This bit indicates if the access was a byte or word size when tracing in Detail Mode
0 Word Access
1 Byte Access
Read Write Indicator — This bit indicates if the corresponding stored address corresponds to a read or write
access when tracing in Detail Mode.
0 Write Access
1 Read Access
Address Bus bit 17— Corresponds to system address bus bit 17.
Address Bus bit 16— Corresponds to system address bus bit 16.
Information Bit Organization
Number
Entry 1
Entry 2
Entry 1
Entry 2
Entry
Table 6-37. Trace Buffer Organization (Normal,Loop1,Detail modes)
CINF1,ADRH1
CINF2,ADRH2
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Field 2
4-bits
PCH1
PCH2
0
0
Figure 6-25. Field2 Bits in Detail Mode
Bit 3
CSZ
Table 6-38. Field Descriptions
CRW
Bit 2
DATAH1
DATAH2
ADRM1
ADRM2
ADDR[17] ADDR[16]
Field 1
Description
PCM1
PCM2
8-bits
Bit 1
Bit 0
DATAL1
DATAL2
Field 0
ADRL1
ADRL2
8-bits
PCL1
PCL2
Freescale Semiconductor

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