S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 277
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S9S12HY64J0MLL
Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12HA32J0CLL.pdf
(792 pages)
Specifications of S9S12HY64J0MLL
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12HY64J0MLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S12HY64J0MLL
Manufacturer:
FREESCALE
Quantity:
20 000
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Windowed COP operation is enabled by setting WCOP in the CPMUCOP register. In this mode, writes to
the CPMUARMCOP register to clear the COP timer must occur in the last 25% of the selected time-out
period. A premature write will immediately reset the part.
7.5.3
The on-chip POR circuitry detects when the internal supply V
(voltage level not specified in this document because this supply is not visible on device pins). POR is
deasserted, if the internal supply V
this document because this supply is not visible on device pins).
7.5.4
The on-chip LVR circuitry detects when one of the supply voltages V
appropriate voltage level. If LVR is deasserted the MCU is fully operational at the specified maximum
speed.The LVR assert and deassert levels for the supply voltage VDDX are V
specified in the device Reference Manual.
7.6
The interrupt/reset vectors requested by the S12CPMU are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
Interrupts
Power-On Reset (POR)
Low-Voltage Reset (LVR)
RTI time-out interrupt
Low voltage interrupt
Interrupt Source
Periodical Interrupt
PLL lock interrupt
High temperature
Oscillator status
Autonomous
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
interrupt
interrupt
Table 7-27. S12CPMU Interrupt Vectors
DD
exceeds an appropriate voltage level (voltage level not specified in
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
CPMUAPICTL (APIE)
CPMUHTCTL (HTIE)
CPMUINT (LOCKIE)
CPMULVCTL (LVIE)
CPMUINT (OSCIE)
CPMUINT (RTIE)
DD
Local Enable
drops below an appropriate voltage level
Table
DD
, V
7-27. Refer to MCU
DDF
LVRXA
or V
and V
DDX
drops below an
LVRXD
and are
277
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