S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 82

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1
1
1
Port Integration Module (S12HYPIMV1)
2.3.18
2.3.19
82
Address 0x0244
Address 0x0245
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
RDRT
PERT
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port T reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (1/6 of the full drive strength)
0 Full drive strength enabled
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
PERT7
PPST7
Port T Pull Device Enable Register (PERT)
Port T Polarity Select Register (PPST)
1
1
7
7
PERT6
PPST6
Figure 2-16. Port T Pull Device Enable Register (PERT)
1
1
6
6
Figure 2-17. Port T Polarity Select Register (PPST)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-15. RDRT Register Field Descriptions
Table 2-16. PERT Register Field Descriptions
PERT5
PPST5
1
1
5
5
PERT4
PPST4
1
1
4
4
Description
Description
PERT3
PPST3
3
1
3
1
PERT2
PPST2
1
1
2
2
Freescale Semiconductor
PERT1
PPST1
Access: User read/write
Access: User read/write
1
1
1
1
PERT0
PPST0
1
1
0
0
1
1

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