S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 476

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Peripheral Interface (S12SPIV5)
476
End of Idle State
SCK Edge Number
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE I
MOSI/MISO
CHANGE O
CHANGE O
SEL SS (O)
Master only
SEL SS (I)
MSB first (LSBFE = 0):
t
t
t
t
MOSI pin
MISO pin
LSB first (LSBFE = 1):
L
T
I
L
Figure 13-12. SPI Clock Format 0 (CPHA = 0), with 8-bit Transfer Width selected (XFRW = 0)
, t
= Minimum idling time between transfers (minimum SS high time)
= Minimum leading time before the first SCK edge
= Minimum trailing time after the last SCK edge
T
, and t
I
are guaranteed for the master mode and required for the slave mode.
t
L
MSB
LSB
1
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
2
Begin
Bit 6
Bit 1
3
4
Bit 5
Bit 2
5
6
Bit 4
Bit 3
7
Transfer
8
Bit 3
Bit 4
9
10
Bit 2
Bit 5
11
12
Bit 1
Bit 6
13 14
End
MSB
15
LSB
16
Minimum 1/2 SCK
Freescale Semiconductor
t
T
for t
Begin of Idle State
T
t
, t
I
l
, t
L
t
L