S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 86

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
Port Integration Module (S12HYPIMV1)
2.3.23
86
Address 0x0249
Read: Anytime.
Write:Never, writes to this register have no effect.
Field
Field
PTIS
PTS
PTS
Reset
7-0
1
0
W
R
Port S general purpose input/output data—Data Register, SCI TXD, PWM channel7
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SCI RXD, PWM channel6
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
• The SCI takes precedence over the PWM7 and general purpose I/O function if enabled
• The PWM7 takes precedence over the general purpose I/O function if enabled
• The SCI takes precedence over the PWM6 and general purpose I/O function if enabled
• The PWM6 takes precedence over the general purpose I/O function if enabled
PTIS7
Port S Input Register (PTIS)
u
7
= Unimplemented or Reserved
PTIS6
Table 2-19. PTS Register Field Descriptions (continued)
u
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-20. PTIS Register Field Descriptions
Figure 2-21. Port S Input Register (PTIS)
PTIS5
u
5
PTIS4
u
4
Description
Description
u = Unaffected by reset
PTIS3
3
u
PTIS2
u
2
Freescale Semiconductor
PTIS1
u
1
Access: User read
PTIS0
u
0
1