S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 646

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

64 KByte Flash Module (S12FTMRC64K1V1)
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data. If the SFDIF or DFDIF flags were not previously set when the invalid read
operation occurred, both the SFDIF and DFDIF flags will be set.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see
17.4.5.1
The Erase Verify All Blocks command will verify that all P-Flash and D-Flash blocks have been erased.
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed.
17.4.5.2
The Erase Verify Block command allows the user to verify that an entire P-Flash or D-Flash block has been
erased. The FCCOB upper global address bits determine which block must be verified.
Upon clearing CCIF to launch the Erase Verify Block command, the Memory Controller will verify that
the selected P-Flash or D-Flash block is erased. The CCIF flag will set after the Erase Verify Block
operation has completed.
646
Register
FSTAT
Erase Verify All Blocks Command
Erase Verify Block Command
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Table 17-31. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
Table 17-33. Erase Verify Block Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
Table 17-32. Erase Verify All Blocks Command Error Handling
ACCERR
Error Bit
FPVIOL
000
000
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Set if CCOBIX[2:0] != 000 at command launch
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Section
17.3.2.7).
0x01
0x02
CAUTION
FCCOB Parameters
FCCOB Parameters
Global address [17:16] of the
Error Condition
Flash block to be verified
Not required
.
Freescale Semiconductor